The present invention relates to the formation of conductive contacts during the fabrication of semiconductor integrated circuits. More particularly, this invention relates to a method for forming an atomically flat interface that prevents diffusion of the conductive material into the underlying semiconductor layer.
The continuing increase in semiconductor device circuit speed and density has been accompanied both by a decrease in the vertical dimensions of devices and by a need for reliable dense wiring. The decrease in vertical dimension has produced shallower device junctions.
In the processing of integrated circuits, individual devices that are comprised of silicon are connected into circuits by subsequent metal layers. Great care must be given to the metal-to-silicon interface because the metal-silicon junction is prone to certain problems that require process attention. Two such problems are high-ohmic connections, which may electrically look like open circuits, and poisoning of the device by the contacting metal.
During formation of an interconnect, a contact hole is created in an insulating layer, typically silicon dioxide, to expose the underlying semiconductor substrate, typically a N+ region set in a Pxe2x88x92 well, or a P+ region set in a Nxe2x88x92 well. To form the interconnect, the appropriate metal is deposited in the contact hole by standard techniques. If the metal is placed in direct contact with the semiconductor substrate, the metal can diffuse into the semiconductor during subsequent processing of the device, especially at temperatures above 400xc2x0 C., which are encountered during device packaging.
Diffusion produces spiking of the metal into the semiconductor. Spiking typically extends for less than about 0.5 micron into the semiconductor, and thus is not a particular problem when the device is greater than 0.5 micron thick. For high-density circuits in which the device is less than 0.5 micron thick, however, spiking can short the metal to the underlying P-well or N-well, rendering the device inoperative.
Metal silicides are typically used to provide good ohmic contact to device junctions. Titanium silicide (TiSi2) has become the most widely used silicide for self-aligned silicide applications in the Ultra Large Scale Integration (ULSI) industry because of its low resistivity, its ability to be self-aligned, and its relatively good thermal stability. Titanium is deposited into the contact hole by standard deposition techniques. Silicidation is conducted by subsequently heating the substrate and metal to about 500xc2x0 C. to 700xc2x0 C.
To minimize junction leakage, the device junction must be kept below the silicide. This distance is determined by the amount of metal deposited in the contact hole, the amount of silicon consumed during heating, and the planarity of the reaction front during heating. The amount of silicon consumed is determined by the stoichiometry and crystal structure of the silicide formed as well as by the anneal time and anneal temperature. For titanium silicide, the molar ratio of metal to silicon is two to one. The planarity of the silicide reaction front is controlled by many variables, such as the cleanliness of the silicon surface before metal deposition and the reaction temperature. Typical semiconductor fabrication sequences produce non-planar, cusped reaction fronts. Junction depths could be made shallower by using a silicidation process that consumed less silicon, produced a more nearly planar reaction front, or both.
To prevent diffusion, many semiconductor fabrication sequences use a diffusion barrier between the metal and the silicon substrate. In a common process sequence, titanium nitride (TiN) is used as a barrier against attack by tungsten hexafluoride and by fluorine during the deposition of tungsten, a commonly used conductive material, by chemical vapor deposition from tungsten hexafluoride. A preferred method for forming the titanium nitride barrier conducts the silicidation reaction in a nitrogen-containing atmosphere, such as nitrogen gas, ammonia vapor, or forming gas. Titanium nitride is formed at the same time as titanium silicide.
The topography of the resulting interface limits the usefulness of this method in the development of smaller shallow junction devices. The method involves competing reactions in a very narrow region: formation of TiOyNz from above and formation of TiSi2 from below. Thus, it is difficult to control the layer thickness of the bilayer, and the layer is typically nitrogen deficient. Formation of the titanium silicide layer consumes silicon from the substrate and the layer can be cusped.
The rough interface between titanium silicides and silicon is not good for shallow junctions or small devices. The layer is an unreliable barrier against attack during the chemical vapor deposition of tungsten, which can lead to tungsten encroachment and ruin the device. Although the barrier properties of the layer can be improved by incorporating oxygen during deposition of the titanium and the subsequent anneal, the non-uniformity in thickness of the TiOyNz layer, which degrades its effectiveness as a barrier, remains a problem.
U.S. Pat. No. 5,567,652 issued to Nishio discloses a method in which (1) a silicon dioxide layer is formed on the surface of the silicon substrate; (2) a layer of titanium is deposited on the oxide layer; (3) a layer of cobalt is deposited on the titanium layer; and (4) the substrate is heat treated in a nitrogen-containing atmosphere. On heat treatment, the titanium reacts with the silicon dioxide to form silicon at the interface. Then, some of the cobalt migrates through the titanium to form a layer of CoSi2 at the interface. The layer of CoSi2 formed at the interface reflects the crystal orientation of the silicon substrate. Consequently, a very flat layer of CoSi2 is formed at the interface.
Several additional steps are introduced into the processing sequence, however, by this method. Initially, it is necessary to form the silicon dioxide layer. Two layers of metal, a layer of titanium and a layer of cobalt, must be individually deposited instead of a single layer of metal. Following heat treatment, it is necessary to remove both the oxygen-containing titanium nitride layer formed during heat treatment and the unreacted cobalt layer before a metal can be deposited on the CoSi2 layer. Removal of each of these layers requires a separate step.
U.S. Pat. No. 5,047,367 issued to Wei discloses a process for the formation of a titanium nitride/cobalt silicide bilayer. The bilayer is formed by (1) depositing a layer of titanium on the silicon layer; (2) depositing a layer of cobalt on the titanium layer; and (3) annealing in a nitrogen-containing atmosphere. An additional step is required, deposition of the cobalt layer, and the final temperature of the anneal is high, about 850-950xc2x0 C.
Thus, a need exists for a method for forming a barrier layer and a silicide layer in which (1) formation of the silicide layer consumes less silicon than a disilicide; (2) the interface formed between the silicide layer and the silicon substrate is a flat interface, preferably an atomically flat interface; and (3) the barrier layer is uniform in thickness. In addition, the method should be readily integratable into the procedures currently used to form semiconductor devices and, preferably, does not introduce additional processing steps.
The invention is a method for forming a semiconductor device with electrical interconnections that have low contact resistance and for forming a barrier layer that prevents undesired diffusion into the silicon substrate. The method comprises:
a) depositing a layer consisting essentially of titanium and an element selected from the group consisting of cobalt, tungsten, tantalum, and molybdenum on a silicon substrate, in which the amount of the element selected from the group consisting of cobalt, tungsten, tantalum, and molybdenum present in the layer does not exceed 20 atomic percent of the total amount of the element and titanium present in the layer;
b) annealing the substrate and the layer in a nitrogen-containing atmosphere at about 500xc2x0 C. to about 700xc2x0 C.; and
c) depositing a conductive material on the layer.
The method produces an atomically flat interface between the silicides formed during processing and the silicon substrate. The flat interface is critical for contacts for very small devices and shallow junctions, such as are required for ULSI shallow junctions. The uniform TiOyNz (titanium oxynitride, tioxynitride) layer formed by this method is a good barrier against attack by tungsten hexafluoride and fluorine during the chemical vapor deposition of tungsten.
Although not intending to be bound by any theory or explanation, it is believed that the cobalt in the titanium-cobalt alloy layer plays two roles during the annealing. First, the cobalt migrates to the silicon surface and slows formation of the silicide. Second, because of differences in both atomic radius and electronic structure between the cobalt and titanium atoms, each of these atoms bonds differently to silicon. This difference in bonding to silicon destroys the long-range spatial and electronic peniodicity of the silicide crystal and allows formation of highly disordered nano-crystalline or amorphous silicide. The highly disordered silicide forms, in turn, an atomically flat interface between silicon and the silicide. Highly disordered silicide also causes formation of a uniformly thick TiOyNz layer. Thus, a much more reliable barrier against attack of the silicon by metal or fluorine is created. In addition, a better-controlled silicide interface, which is more suitable for contact in shallow junction applications, is formed.
Unlike cobalt, the elements tungsten, tantalum, and molybdenum have atomic diameters that are similar to that of titanium. However, they have different electronic structures. Because of these differences in electronic structure, each of these atoms bonds differently to silicon, destroying the long-range spatial and electronic periodicity of the silicide crystal. As in the case of cobalt, this forms a highly disordered nano-crystalline or amorphous silicide.
In another embodiment, the invention is a contact in which the interface between the silicon substrate and its adjacent layer is atomically flat. In still another embodiment, the invention is a contact formed by the method of the invention. It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.